1. Field of the Invention
The present invention relates to a semiconductor package and, more particularly, to a semiconductor package and a method of fabricating a semiconductor package, which can reduce packaging time and provide a steadier product structure.
2. Description of the Related Art
The formation of a solder ball on a bonding pad of a semiconductor die will now be explained with the reference of FIGS. 10 and 11.
First, as shown in FIG. 10, a semiconductor die 10 is prepared. The semiconductor die 10 has at least one bonding pad 11 on its pad mounting surface. A layer of solder paste 13 is applied on the bonding pad 11 of the semiconductor die 10. As shown in FIG. 11, a solder ball 12 is formed from the layer of solder paste 13 in a reflow process, such that a semiconductor package is constituted.
However, in the formation of the solder ball on the bonding pad of the semiconductor die as described above, the reflow process is lengthy, causing the whole manufacturing time of the semiconductor package to increase, and thus the quantity of output is reduced and the manufacturing cost is increased. Moreover, the solder ball 12 will be easily peeled from the bonding pad 11 of the semiconductor die 10. Furthermore, a height of the solder ball 12 from the surface of the semiconductor die 10 to a top end of the solder ball 12 is difficult to control during the manufacturing process, and hence the solder balls 12 will obtain different heights, respectively. Thus, it is easy to generate poor contact or no connection when the semiconductor package is electrically connected to an external circuit.